R - Set or Display Current CPU Registers

Display or set the current CPU registers saved on entry to the Kernel Debugger. Set default addresses for E command, D command, K command and U command.

Under the Dump Formatter this command is implemented as an alias to the .R command. Also applicable to the Dump Formatter only, the default adressing mode is not set according to the VM flags of the EFLAGS register but is assumed always to be in protect mode. This has been corrected from fix pack 29 of Wapr 3.0 and base Warp 4.0.

The remaining discussion in the section applies to the Kernel Debugger.

Syntax:

──── R ───┬─────────────────────┬──────────────────────────────
            │                     │
            ├── T               ──┤
            │                     │
            ├─┤ flag register   ├─┤
            │                     │
            ├─┤ 2-bit flag      ├─┤
            │                     │
            ├─┤ 16-bit register ├─┤
            │                     │
            └─┤ 32-bit register ├─┘

flag register:


             ┌─────────────────────────┐
                                      │
├─┬─ F  ─┬─────┬────────────────────┬──┴──────────────────────────┤
  ├─ EF ─┘     └── flag mnemonics ──┘
  │
  │          ┌─────────────────────────────┐
  │                                       │
  ├─ CR0 ──────┬────────────────────────┬──┴──────────────────────┤
  │            └── cr0 flag mnemonics ──┘
  │          ┌─────────────────────────────┐
  │                                       │
  └─ MSW ──────┬────────────────────────┬──┴──────────────────────┤
               └── msw flag mnemonics ──┘

2-bit flag:

├─── IOPL ─┬──────┬───────────────────────────────────────────────┤
           └─ pl ─┘


16-bit register:

├──┬─ AX   ─┬─────┬──────────────────┬────────────────────────────┤
   ├─ BX   ─┤     │                  │
   ├─ CX   ─┤     └── 16-bit value ──┘
   ├─ DX   ─┤
   ├─ SI   ─┤
   ├─ DI   ─┤
   ├─ SP   ─┤
   ├─ BP   ─┤
   ├─ IP   ─┤
   ├─ PC   ─┤
   ├─ ES   ─┤
   ├─ CS   ─┤
   ├─ DS   ─┤
   ├─ SS   ─┤
   ├─ FS   ─┤
   ├─ GS   ─┤
   ├─ TR   ─┤
   ├─ IDTL ─┤
   ├─ GDTL ─┤
   └─ LDTR ─┘



32-bit register:

├──┬─ EAX  ─┬─────┬──────────────────┬────────────────────────────┤
   ├─ EBX  ─┤     │                  │
   ├─ ECX  ─┤     └── 32-bit value ──┘
   ├─ EDX  ─┤
   ├─ ESI  ─┤
   ├─ EDI  ─┤
   ├─ ESP  ─┤
   ├─ EBP  ─┤
   ├─ EIP  ─┤
   ├─ CR2  ─┤
   ├─ CR3  ─┤
   ├─ CR4  ─┤
   ├─ DR0  ─┤
   ├─ DR1  ─┤
   ├─ DR2  ─┤
   ├─ DR3  ─┤
   ├─ DR6  ─┤
   ├─ DR7  ─┤
   ├─ TR6  ─┤
   ├─ TR7  ─┤
   ├─ IDTB ─┤
   └─ GDTB ─┘

Parameters:

• Default)
  Displays the current CPU registers on entry to the Kernel Debugger and sets default addresses for E command, D command and U command.

  Register mnemonics are assigned the values displayed for use in address expressions and operands of other Kernel Debugger and Dump Formatter commands.

  Note:

  The .SS command may be used to change the displayed values of CS, EIP, SS and ESP. It does not affect the values restored then the Kernel Debugger returns control to the system.

  T
  Toggle register display mode between terse and non-terse forms. The terse form suppresses display of the test, debug, control, descriptor table and task registers.

  This option affects both the R and .R commands.

  flag register
  Specifies one of the flag registers to be modified. The following mnemonics may be used:

  F

  80286 FLAGS register.
  EF
  80486 EFLAGS register.
  MSW
  Machine status word.
  CR0
  Control register 0
  Each of the flag bits is specified by a mnemonic. More than one flag may be specified, order being unimportant. The Kernel Debugger processes the flags from left to right, if an invalid flag is encountered processing stops, but those flags already processed remain in effect.

  Some flags are toggled by specifying a single mnemonic, others use a one mnemonic for the set condition and a another of the reset condition.

  If replacements flags are omitted then the user is prompted for values.

  flag mnemonics
  Specifies one or more updated flags values for the FLAGS or EFLAGS registers.

  The following mnemonics are defined. The value of t implies the flag value is toggled when the mnemonic is specified:

  ┌────┬────┬─────┬──────────────────────────────┐
  │Flag│Bit │Value│Description                   │
  ├────┼────┼─────┼──────────────────────────────┤
  │VM  │17  │t    │Virtual 8086 Mode (EFLAGS     │
  │    │    │     │only)                         │
  ├────┼────┼─────┼──────────────────────────────┤
  │RF  │16  │t    │Resume Flag - Disable Debug   │
  │    │    │     │Exceptions (EFLAGS only)      │
  ├────┼────┼─────┼──────────────────────────────┤
  │NT  │14  │t    │Nested Task                   │
  ├────┼────┼─────┼──────────────────────────────┤
  │OV  │11  │1    │Overflow                      │
  ├────┼────┼─────┼──────────────────────────────┤
  │NV  │11  │0    │¬Overflow                     │
  ├────┼────┼─────┼──────────────────────────────┤
  │DN  │10  │1    │Direction Down                │
  ├────┼────┼─────┼──────────────────────────────┤
  │UP  │10  │0    │Direction Up                  │
  ├────┼────┼─────┼──────────────────────────────┤
  │EI  │9   │1    │Enable Interrupts             │
  ├────┼────┼─────┼──────────────────────────────┤
  │DI  │9   │0    │Disable Interrupts            │
  ├────┼────┼─────┼──────────────────────────────┤
  │NG  │7   │1    │Negative Sign                 │
  ├────┼────┼─────┼──────────────────────────────┤
  │PL  │7   │0    │Plus Sign                     │
  ├────┼────┼─────┼──────────────────────────────┤
  │ZR  │6   │1    │Zero Result                   │
  ├────┼────┼─────┼──────────────────────────────┤
  │NZ  │6   │0    │Non-zero Result               │
  ├────┼────┼─────┼──────────────────────────────┤
  │AC  │4   │1    │Auxiliary Carry               │
  ├────┼────┼─────┼──────────────────────────────┤
  │NA  │4   │0    │¬Auxiliary Carry              │
  ├────┼────┼─────┼──────────────────────────────┤
  │PE  │2   │1    │Parity Even                   │
  ├────┼────┼─────┼──────────────────────────────┤
  │PO  │2   │0    │Parity Odd                    │
  ├────┼────┼─────┼──────────────────────────────┤
  │CY  │0   │1    │Carry                         │
  ├────┼────┼─────┼──────────────────────────────┤
  │NC  │0   │0    │¬Carry                        │
  └────┴────┴─────┴──────────────────────────────┘
  

  cr0 flag mnemonics
  Specifies one or more updated flags values for the CR0 register.

  The following mnemonics are defined:

  ┌────┬──────┬──────┬──────────────────────────────┐
  │Bit │Value │Flag  │Description                   │
  ├────┼──────┼──────┼──────────────────────────────┤
  │PG  │31    │1     │Paging Enabled                │
  ├────┼──────┼──────┼──────────────────────────────┤
  │ET  │4     │1     │Extension Type Flag - x87     │
  │    │      │      │support                       │
  ├────┼──────┼──────┼──────────────────────────────┤
  │TS  │3     │1     │Task Switch Flag              │
  ├────┼──────┼──────┼──────────────────────────────┤
  │EM  │2     │1     │Emulation exception           │
  ├────┼──────┼──────┼──────────────────────────────┤
  │MP  │1     │1     │Math Present                  │
  ├────┼──────┼──────┼──────────────────────────────┤
  │PM  │0     │1     │Protect Mode Enabled          │
  └────┴──────┴──────┴──────────────────────────────┘
  

  msw flag mnemonics
  Specifies one or more updated flags values for the MSW register.

  The following mnemonics are defined:

  ┌────┬────┬─────┬──────────────────────────────┐
  │flag│bit │value│description                   │
  ├────┼────┼─────┼──────────────────────────────┤
  │TS  │3   │1    │Task Switch Flag              │
  ├────┼────┼─────┼──────────────────────────────┤
  │EM  │2   │1    │Emulation exception           │
  ├────┼────┼─────┼──────────────────────────────┤
  │MP  │1   │1    │Math Present                  │
  ├────┼────┼─────┼──────────────────────────────┤
  │PM  │0   │1    │Protect Mode Enabled          │
  └────┴────┴─────┴──────────────────────────────┘
  

  2-bit flag
  This option is used to specify that the IOPL field of the FLAGS or EFLAGS register should be updated with the specified replacement 2-bit value. The mnemonic IOPL is coded to specify this option.

  If the replacement value is not specified then the user is prompted for a value.

  16-bit register
  This option is used to set the value of a register where 16-bit register specifies either one of the standard INTEL register mnemonics or:

  GDTL

  The GDT limit.
  IDTL
  The IDT limit.
  PC
  The program counter. This is synonymous with IP.
  This option implies a request to update a register value. If the corresponding new 16-bit value is not specified then the prompted for a replacement value.
  32-bit register
  This option is used to set the value of a register where 32-bit register specifies one of the standard INTEL register mnemonics or GDTB or IDTB.

  This option implies a request to update a register value. If the corresponding new 32-bit value is not specified then the prompted for a replacement value.

  2-bit value
  Specifies the 2-bit replacement value for the IOPL.
  16-bit value
  Specifies the 16-bit replacement vaule for a given 16-bit register.
  32-bit value
  Specifies the 32-bit replacement vaule for a given 32-bit register.

  Results & Notes:

  The register information is obtained from a special save area when the Kernel Debugger is entered and restored from this area when control returns to the system.

  When no operands are specified the R command operates in display mode in exactly the same manner as the .R command.

  From fix pack 29 for Warp 3.0 and base Warp 4.0 Pentium Processor support was added to the Kernel Debugger. This allows CR4 to be specified as a register mnemonic, though CR4 is never displayed without specifying it explicitely as an operand to the R command. On non-Pentium systems, CR4 is shown as 00000000.

  When operands are specified the R command. operates in alter mode. If no replacement value is supplied on the command then the user is prompted with the current value followed by a colon prompt character. For example:

  ##R SS
  0030
  :
  
  

  Flag register value prompts have their current flag setting interpreted using the mnemonics described above. For example:

  ##R EF
  --(rf) --(vm) --(nt) nv(ov) up(dn) ei(di) pl(ng) nz(zr) na(ac) po(pe) nc(cy)
  :
  
  

  This example shows mnemonics for current settings followed by their negating mnemonic in brackets. For example:

  RF is not in effect, but since it is a toggle flag, the value RF specified at the prompt would set RF.

  NV is in effect. To negate it, specify OV at the prompt.

  ---

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