MOV
The opcode is 'MOV', the first operand is the CL register, and the second operand is the DH register. This instruction will copy (MOVe) all 8 bits from the DH register to the CL register.
The opcode is 'MOV', the first operand is the DX register, the second operand is the immediate value of 8. This instruction puts the value 8 into the DX register.
Again, the opcode is 'MOV', and the instruction will copy all 32 bits of ESP into EBP.
You should be able to tell by now that this instruction will copy 16 bits from BX to AX. Note that instructions which reference only registers are extremely unlikely to cause an exception.
This instruction is different from the one above because there are brackets around the second operand. This means that the operand, BX in this case, is in storage, and the BX register holds the offset into the DS segment. If BX is outside the limit of the DS segment, a general protection fault will occur.
This instruction is similar to the preceeding one, but moves data into storage, rather than from storage. The same exceptions might occur, and if the DS segment is read-only, this instruction would also fail.
This is an example of overriding the default segment, DS, by explicitly specifying that the offset in the BX register applies to the ES segment.
This would add the 16 bits from AX into storage at DS:BP, developing the sum directly in storage. The override is needed because the use of BP means that the default segment is SS.
Some instructions have only one operand. In this case it is in storage at an offset calculated by subtracting 2 from the BP value, in the segment defined by the SS register, because BP is used.
Also SUB, CMP, AND, OR, XOR, XCHG, INC, SHL, etc.
It is extremely common for 16-bit code to use FAR addresses. When they are in storage, it would require several instructions to get a FAR address into the registers, if it were not for several instructions whose purpose is specifically to fetch a FAR address from storage into a selector and another register. These instructions may be recognized by the opcode, which is the letter 'L' followed by a selector register name other than CS. The apparent first operand is the general, base, or index register which will hold the offset part of the far address. Both registers will be loaded, with the first operand coming from the address specified, and the selector coming from the following word.
LES
This instruction loads BOTH BX and ES. BX comes from BP+6 and ES comes from BP+8, both in the stack segment.
LDS
This instruction loads BOTH SI and DS, SI is loaded from BP-12 and DS is loaded from BP-10.
LEA
Load Effective Address DOES NOT actually reference storage. Instead, once the offset has been calculated, it is put into the target register, EDI in this case. Address expressions like this are possible, but not often seen while actually debugging. The scale factor can be 1, 2, 4, or 8; not any arbitrary value