General Registers

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|                        EAX                          | ALL 32 BITS
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   ( part of EAX )           |           AX           | LOW 16 BITS
                             --------------------------
   ( part of AX )            |     AH     |             HIGH 8 BITS
                             --------------------------
   ( part of AX )                         |    AL     | LOW 8 BITS
                                          -------------

   Registers EBX, ECX, and EDX  also subset in the same way.
   There are two byte-sized pieces, which can be collectively
   referenced as a word-sized item.




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|                        EIP                          | ALL 32 BITS
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   ( part of EIP )           |           IP           | LOW 16 BITS
                             --------------------------

IP and EIP are always offsets into CS.
They always contain the address of the next instruction to execute.


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|                        ESP                          | ALL 32 BITS
-------------------------------------------------------
   ( part of ESP )           |           SP           | LOW 16 BITS
                             --------------------------

SP and ESP are always offsets into SS.
They contain the address of the last item pushed into the stack.


   REGISTERS EBP, ESI, and EDI also subset in this way.
                              They have no 8 bit parts.


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